A design space exploration scheme for data-path synthesis

Design Space Exploration for Data Path Synthesis

In this paper we examine the multi-criteria optimization involved in scheduling for data path synthesis (DPS). We present a method to find non-dominated schedules using a combination of restricted search and heuristic scheduling techniques. Our method supports design with architectural constraints such as the total number of functional units, buses, etc. The schedules produced have been taken t...

Design space exploration and optimization of path oblivious RAM in secure processors Citation

Keeping user data private is a huge problem both in cloud computing and computation outsourcing. One paradigm to achieve data privacy is to use tamper-resistant processors, inside which users’ private data is decrypted and computed upon. These processors need to interact with untrusted external memory. Even if we encrypt all data that leaves the trusted processor, however, the address sequence ...

Secure FPGA Design by Filling Unused Spaces

Nowadays there are different kinds of attacks on Field Programmable Gate Array (FPGA). As FPGAs are used in many different applications, its security becomes an important concern, especially in Internet of Things (IoT) applications. Hardware Trojan Horse (HTH) insertion is one of the major security threats that can be implemented in unused space of the FPGA. This unused space is unavoidable to ...

Designing Path for Robot Arm Extensions Series with the Aim of Avoiding Obstruction with Recurring Neural Network

In this paper, recurrent neural network is used for path planning in the joint space of the robot with obstacle in the workspace of the robot. To design the neural network, first a performance index has been defined as sum of square of error tracking of final executor. Then, obstacle avoidance scheme is presented based on its space coordinate and its minimum distance between the obstacle and ea...

A Power Aware Cache and Register File Design Space Exploration